This invention relates to a time correction circuit which insures that each incoming pulse of each of a multiplicity of incoming digital lines is disposed in the correct time position to be sampled by a digital multiplexer.
Large digital central offices or switching centers in urban areas have to be interconnected. The use of cable (including wire pairs) for this purpose, laid beneath streets, is becoming very expensive. In recent years, for example, the price of telephone cable has been rising sharply because of the increased cost of copper and petroleum-based plastic. Moreover, in rapidly growing areas of the telephone plant, such as the exchange area, the cost of installing new cables has increased significantly. Furthermore, telephone companies are faced with dwindling duct and manhole space. Clearly, one solution to these problems is the use of high frequency radio as an alternative means of interconnection. As a cable substitute, a radio system can be considered simply as a box with input and output terminals. The user connects to the input terminals just as to a cable and the radio system delivers the digital signals to the other end just as from a cable. A principal advantage of a high frequency (60 GHz) transmission system is that it has sufficient bandwidth to handle a large number of digital signals.
Because such a transmission system possesses a potentially large channel capacity (e.g., 50 megabits/sec.), the requisite multiplexer (and demultiplexer) can prove to be relatively complex. For example, in a proposed system, the multiplexer will accept 32 input digital lines (each at the T-1 bit rate of 1.544 megabits/sec.) and multiplex the same into a composite, bit interleaved, serial bit stream (49.408 megabits/sec.). This bit stream would then be modulated onto a carrier for radio transmission to a remote office. Now since the input lines to the multiplexer originate from the same central office, the signals on each input line will typically be locked to the same frequency. This, of course, simplifies the multiplexer design and will lower costs considerably. However, the digital bit streams on the input lines can arrive in random phase at the multiplexer input. Without correction, this randomness in phase between the digital signals on the input lines could result in some lines not being bit sampled or being sampled into the wrong time slot.